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ULN2064B Технические параметры
Allegro MicroSystems ULN2064B technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Transistors - FETs, MOSFETs - Single | |
| Марка | ||
| Factory Lead Time | 16 Weeks, 2 Days | |
| Surface Mount | NO | |
| Number of Terminals | 16Terminals | |
| Transistor Element Material | SILICON | |
| Manufacturer Part Number | ULN2064B | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Active | |
| Ihs Manufacturer | STMICROELECTRONICS | |
| Part Package Code | DIP | |
| Package Description | IN-LINE, R-PDIP-T16 | |
| Risk Rank | 1.13 | |
| Samacsys Description | ULN2064B, Darlington Transistor Array, NPN 1.75 A 50 V, Quad, 16-Pin, Power PDIP | |
| Number of Elements | 4 Elements | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Shape | RECTANGULAR | |
| Package Style | IN-LINE | |
| Reflow Temperature-Max (s) | NOT SPECIFIED |
| Свойство продукта | Значение свойства | |
|---|---|---|
| JESD-609 Code | e3 | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin (Sn) | |
| Additional Feature | LOGIC LEVEL COMPATIBLE | |
| HTS Code | 8541.29.00.95 | |
| Terminal Position | DUAL | |
| Terminal Form | THROUGH-HOLE | |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
| Reach Compliance Code | not_compliant | |
| Pin Count | 16 | |
| JESD-30 Code | R-PDIP-T16 | |
| Qualification Status | Not Qualified | |
| Configuration | 4 BANKS, DARLINGTON WITH BUILT-IN DIODE AND RESISTOR | |
| Transistor Application | SWITCHING | |
| Polarity/Channel Type | NPN | |
| Collector Current-Max (IC) | 1.75 A | |
| Collector-Emitter Voltage-Max | 35 V | |
| VCEsat-Max | 1.4 V |
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