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- EPM7064LC84-12
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EPM7064LC84-12 Технические параметры
ALTERA EPM7064LC84-12 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - CPLDs (Complex Programmable Logic Devices) | |
| Марка | ALTERA | |
| Mounting Type | Surface Mount | |
| Package / Case | 52-LCC (J-Lead) | |
| Surface Mount | YES | |
| Supplier Device Package | 52-PLCC (19.13x19.13) | |
| Number of Terminals | 84Terminals | |
| Memory Types | Volatile | |
| Number of I/Os | 68I/Os | |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | |
| Number of Macrocells | 64Macrocells | |
| Package Description | QCCJ, LDCC84,1.2SQ | |
| Package Style | CHIP CARRIER | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Equivalence Code | LDCC84,1.2SQ | |
| Supply Voltage-Nom | 5 V | |
| Reflow Temperature-Max (s) | 30 | |
| Supply Voltage-Min | 4.75 V | |
| Operating Temperature-Max | 70 °C | |
| Rohs Code | No | |
| Manufacturer Part Number | EPM7064LC84-12 | |
| Clock Frequency-Max | 125 MHz | |
| Package Code | QCCJ | |
| Package Shape | SQUARE | |
| Manufacturer | Intel Corporation | |
| Part Life Cycle Code | Obsolete | |
| Number of I/O Lines | 68I/O Lines | |
| Risk Rank | 5.35 | |
| Supply Voltage-Max | 5.25 V | |
| Ihs Manufacturer | INTEL CORP | |
| Operating Temperature | 0°C ~ 70°C (TA) | |
| Series | -- | |
| Packaging | Tube | |
| JESD-609 Code | e0 | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Terminal Finish | TIN LEAD | |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Programmable Logic Devices | |
| Technology | SRAM - Dual Port, Asynchronous | |
| Voltage - Supply | 4.5 V ~ 5.5 V | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 220 | |
| Terminal Pitch | 1.27 mm | |
| Reach Compliance Code | compliant | |
| Base Part Number | IDT7140 | |
| JESD-30 Code | S-PQCC-J84 | |
| Qualification Status | Not Qualified | |
| Power Supplies | 3.3/5,5 V | |
| Temperature Grade | COMMERCIAL | |
| Programmable Type | EE PLD | |
| Memory Size | 8Kb (1K x 8) | |
| Propagation Delay | 12 ns | |
| Access Time | 35ns | |
| Memory Format | SRAM | |
| Memory Interface | Parallel | |
| Organization | 0 DEDICATED INPUTS, 68 I/O | |
| Seated Height-Max | 5.08 mm | |
| Programmable Logic Type | EE PLD | |
| Write Cycle Time - Word, Page | 35ns | |
| Number of Gates | 1250Gates | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 64Macro Cells | |
| JTAG BST | NO | |
| Voltage Supply - Internal | 4.75 V ~ 5.25 V | |
| Delay Time tpd(1) Max | 12.0ns | |
| Number of Logic Elements/Blocks | 4Logic Elements/Blocks | |
| In-System Programmable | NO | |
| Width | 29.3116 mm | |
| Length | 29.3116 mm |
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