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- EPM7064SLC44-5N
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EPM7064SLC44-5N Технические параметры
ALTERA EPM7064SLC44-5N technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - CPLDs (Complex Programmable Logic Devices) | |
| Марка | ALTERA | |
| Mount | Surface Mount | |
| Surface Mount | YES | |
| Number of Pins | 44Pins | |
| Number of Terminals | 44Terminals | |
| Schedule B | 8542390000/8542390000, 8542390000/8542390000/8542390000/8542390000/8542390000 | |
| Number of Macrocells | 64Macrocells | |
| Number of I/Os | 36I/Os | |
| RoHS | Compliant | |
| Memory Types | EEPROM | |
| Package Description | QCCJ, LDCC44,.7SQ | |
| Package Style | CHIP CARRIER | |
| Moisture Sensitivity Levels | 3 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Equivalence Code | LDCC44,.7SQ | |
| Supply Voltage-Nom | 5 V | |
| Reflow Temperature-Max (s) | 40 | |
| Supply Voltage-Min | 4.75 V | |
| Operating Temperature-Max | 70 °C | |
| Rohs Code | Yes | |
| Manufacturer Part Number | EPM7064SLC44-5N | |
| Clock Frequency-Max | 250 MHz | |
| Package Code | QCCJ | |
| Package Shape | SQUARE | |
| Manufacturer | Intel Corporation | |
| Part Life Cycle Code | Obsolete | |
| Number of I/O Lines | 36I/O Lines | |
| Ihs Manufacturer | INTEL CORP | |
| Supply Voltage-Max | 5.25 V | |
| Risk Rank | 5.35 | |
| Packaging | Bulk | |
| JESD-609 Code | e3 | |
| ECCN Code | EAR99 | |
| Terminal Finish | Matte Tin (Sn) | |
| Max Operating Temperature | 70 °C |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Min Operating Temperature | 0 °C | |
| Additional Feature | 64 MACROCELLS; 4 LABS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Programmable Logic Devices | |
| Technology | CMOS | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 245 | |
| Terminal Pitch | 1.27 mm | |
| Reach Compliance Code | compliant | |
| Frequency | 250 MHz | |
| JESD-30 Code | S-PQCC-J44 | |
| Qualification Status | Not Qualified | |
| Power Supplies | 5 V | |
| Temperature Grade | COMMERCIAL | |
| Max Supply Voltage | 3.6 V | |
| Min Supply Voltage | 3 V | |
| Propagation Delay | 5 ns | |
| Turn On Delay Time | 5 ns | |
| Organization | 0 DEDICATED INPUTS, 36 I/O | |
| Seated Height-Max | 4.572 mm | |
| Programmable Logic Type | EE PLD | |
| Number of Logic Elements/Cells | 4Logic Elements/Cells | |
| Number of Gates | 1250Gates | |
| Max Frequency | 175.4 MHz | |
| Number of Programmable I/O | 36Programmable I/Os | |
| Number of Logic Blocks (LABs) | 4Logic Blocks (LABs)s | |
| Speed Grade | 5 | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 64Macro Cells | |
| JTAG BST | NO | |
| In-System Programmable | YES | |
| Width | 16.5862 mm | |
| Length | 16.5862 mm | |
| Lead Free | Lead Free |
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