
Локаль
Язык
- English
- русский
Валюта
- CNY-¥
- RUB-₽
Цена такой валюты может меняться в зависимости от курса только для справки
Altera Corporation EP1800LI-2 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
Свойство продукта | Значение свойства | |
---|---|---|
Классификация | Embedded - PLDs (Programmable Logic Device) | |
Марка | ||
Surface Mount | YES | |
Number of Terminals | 68Terminals | |
Rohs Code | No | |
Part Life Cycle Code | Obsolete | |
Ihs Manufacturer | ALTERA CORP | |
Part Package Code | LCC | |
Package Description | QCCJ, LDCC68,1.0SQ | |
Clock Frequency-Max | 20.8 MHz | |
Number of I/O Lines | 48I/O Lines | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | QCCJ | |
Package Equivalence Code | LDCC68,1.0SQ | |
Package Shape | SQUARE | |
Package Style | CHIP CARRIER | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.5 V | |
Supply Voltage-Nom | 5 V | |
JESD-609 Code | e0 | |
Pbfree Code | No |
Свойство продукта | Значение свойства | |
---|---|---|
Terminal Finish | TIN LEAD | |
Additional Feature | 48 MACROCELLS | |
HTS Code | 8542.39.00.01 | |
Terminal Position | QUAD | |
Terminal Form | J BEND | |
Peak Reflow Temperature (Cel) | 220 | |
Terminal Pitch | 1.27 mm | |
Reach Compliance Code | unknown | |
Pin Count | 68 | |
JESD-30 Code | S-PQCC-J68 | |
Qualification Status | Not Qualified | |
Temperature Grade | INDUSTRIAL | |
Propagation Delay | 70 ns | |
Organization | 12 DEDICATED INPUTS, 48 I/O | |
Programmable Logic Type | OT PLD | |
Output Function | MACROCELL | |
Number of Macro Cells | 48Macro Cells | |
JTAG BST | NO | |
Number of Dedicated Inputs | 12Dedicated Inputs | |
In-System Programmable | NO | |
Length | 24.2316 mm | |
Width | 24.2316 mm |