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- Integrated Circuits (ICs)
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- Embedded - CPLDs (Complex Programmable Logic Devices)
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- CY7C342B-30RI
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CY7C342B-30RI Технические параметры
Cypress CY7C342B-30RI technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - CPLDs (Complex Programmable Logic Devices) | |
| Марка | Cypress | |
| Mounting Type | Surface Mount | |
| Surface Mount | NO | |
| Number of Terminals | 68Terminals | |
| Manufacturer | LITE-ON SEMICONDUCTOR CORP. | |
| Package Description | WPGA, PGA68,11X11 | |
| Package Style | GRID ARRAY, WINDOW | |
| Package Body Material | CERAMIC, METAL-SEALED COFIRED | |
| Package Equivalence Code | PGA68,11X11 | |
| Operating Temperature-Min | -40 °C | |
| Supply Voltage-Nom | 5 V | |
| Reflow Temperature-Max (s) | NOT SPECIFIED | |
| Supply Voltage-Min | 4.5 V | |
| Operating Temperature-Max | 85 °C | |
| Rohs Code | No | |
| Manufacturer Part Number | CY7C342B-30RI | |
| Clock Frequency-Max | 27.7 MHz | |
| Package Code | WPGA | |
| Package Shape | SQUARE | |
| Part Life Cycle Code | Obsolete | |
| Number of I/O Lines | 52I/O Lines | |
| Ihs Manufacturer | CYPRESS SEMICONDUCTOR CORP | |
| Supply Voltage-Max | 5.5 V | |
| Risk Rank | 5.36 | |
| Part Package Code | PGA | |
| Packaging | SMC |
| Свойство продукта | Значение свойства | |
|---|---|---|
| JESD-609 Code | e0 | |
| Terminal Finish | Tin/Lead (Sn/Pb) | |
| Additional Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK | |
| HTS Code | 8542.39.00.01 | |
| Subcategory | Programmable Logic Devices | |
| Technology | CMOS | |
| Terminal Position | PERPENDICULAR | |
| Terminal Form | PIN/PEG | |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
| Terminal Pitch | 2.54 mm | |
| Reach Compliance Code | not_compliant | |
| Pin Count | 68 | |
| JESD-30 Code | S-CPGA-P68 | |
| Qualification Status | Not Qualified | |
| Power Supplies | 5 V | |
| Temperature Grade | INDUSTRIAL | |
| Propagation Delay | 60 ns | |
| Organization | 7 DEDICATED INPUTS, 52 I/O | |
| Seated Height-Max | 5.08 mm | |
| Programmable Logic Type | UV PLD | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 128Macro Cells | |
| JTAG BST | NO | |
| Number of Dedicated Inputs | 7Dedicated Inputs | |
| In-System Programmable | NO | |
| Width | 27.9527 mm | |
| Length | 27.9527 mm |
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