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DMP4025LSD-13 Технические параметры

Diodes Incorporated  DMP4025LSD-13 technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Transistors - FETs, MOSFETs - Arrays
Марка
Factory Lead Time 17 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-SOIC (0.154, 3.90mm Width)
Number of Pins 8Pins
Weight 73.992255mg
Transistor Element Material SILICON
Current - Continuous Drain (Id) @ 25℃ 6.9A
Number of Elements 2 Elements
Turn Off Delay Time 53.7 ns
Operating Temperature -55°C~150°C TJ
Packaging Cut Tape (CT)
Published 2013
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8Terminations
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Power Dissipation 1.8W
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Time@Peak Reflow Temperature-Max (s) 40
Свойство продукта Значение свойства
Base Part Number DMP4025LSD
Operating Mode ENHANCEMENT MODE
Power Dissipation 1.8W
Turn On Delay Time 6.9 ns
FET Type 2 P-Channel (Dual)
Transistor Application SWITCHING
Rds On (Max) @ Id, Vgs 25m Ω @ 3A, 10V
Vgs(th) (Max) @ Id 1.8V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds 1640pF @ 20V
Gate Charge (Qg) (Max) @ Vgs 33.7nC @ 10V
Rise Time 14.7ns
Drain to Source Voltage (Vdss) 40V
Fall Time (Typ) 30.9 ns
Continuous Drain Current (ID) -7.6A
Threshold Voltage -1.3V
Gate to Source Voltage (Vgs) 20V
Drain-source On Resistance-Max 0.045Ohm
Drain to Source Breakdown Voltage -40V
FET Technology METAL-OXIDE SEMICONDUCTOR
FET Feature Logic Level Gate
Height 1.5mm
Length 4.95mm
Width 3.95mm
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

DMP4025LSD-13 Документы

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