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EP20K600EFC672-1N Технические параметры

Intel  EP20K600EFC672-1N technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Embedded - FPGAs (Field Programmable Gate Array)
Марка Intel
Mounting Type Surface Mount
Package / Case 672-BBGA
Surface Mount YES
Number of I/Os 508I/Os
Operating Temperature 0°C~85°C TJ
Packaging Tray
Series APEX-20KE®
JESD-609 Code e1
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 672Terminations
ECCN Code 3A001.A.7.A
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
HTS Code 8542.39.00.01
Voltage - Supply 1.71V~1.89V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 245
Supply Voltage 1.8V
Terminal Pitch 1mm
Свойство продукта Значение свойства
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number EP20K600
JESD-30 Code S-PBGA-B672
Number of Outputs 500Outputs
Qualification Status Not Qualified
Power Supplies 1.81.8/3.3V
Clock Frequency 160MHz
Propagation Delay 1.57 ns
Number of Inputs 500Inputs
Programmable Logic Type LOADABLE PLD
Number of Logic Elements/Cells 24320Logic Elements/Cells
Total RAM Bits 311296
Number of Gates 1537000Gates
Number of LABs/CLBs 2432LABs/CLBs
Output Function MACROCELL
Number of Dedicated Inputs 4Dedicated Inputs
Length 27mm
Height Seated (Max) 3.5mm
Width 27mm
RoHS Status RoHS Compliant
Просмотр сходства

EP20K600EFC672-1N Документы

EP20K600EFC672-1N brand manufacturers: Intel, Anli stock, EP20K600EFC672-1N reference price.Intel. EP20K600EFC672-1N parameters, EP20K600EFC672-1N Datasheet PDF and pin diagram description download.You can use the EP20K600EFC672-1N Embedded - FPGAs (Field Programmable Gate Array), DSP Datesheet PDF, find EP20K600EFC672-1N pin diagram and circuit diagram and usage method of function,EP20K600EFC672-1N electronics tutorials.You can download from the Anli.