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- GAL22V10D-15LJ
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GAL22V10D-15LJ Технические параметры
Lattice Semiconductor Corporation GAL22V10D-15LJ technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - CPLDs (Complex Programmable Logic Devices) | |
| Марка | ||
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 28-LCC (J-Lead) | |
| Number of Pins | 28Pins | |
| Number of I/Os | 10I/Os | |
| Operating Temperature | 0°C~75°C TA | |
| Packaging | Bulk | |
| Series | GAL®22V10 | |
| Published | 1996 | |
| JESD-609 Code | e0 | |
| Pbfree Code | no | |
| Part Status | Obsolete | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 28Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin/Lead (Sn85Pb15) | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 225 | |
| Supply Voltage | 5V | |
| Terminal Pitch | 1.27mm | |
| Frequency | 83.3MHz |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | GAL22V10 | |
| Pin Count | 28 | |
| Number of Outputs | 10Outputs | |
| Operating Supply Voltage | 5V | |
| Power Supplies | 5V | |
| Programmable Type | EE PLD | |
| Max Supply Voltage | 5.25V | |
| Min Supply Voltage | 4.75V | |
| Nominal Supply Current | 90mA | |
| Propagation Delay | 15 ns | |
| Turn On Delay Time | 15 ns | |
| Architecture | PAL-TYPE | |
| Output Function | MACROCELL | |
| Number of Macro Cells | 10Macro Cells | |
| Number of Dedicated Inputs | 11Dedicated Inputs | |
| Voltage Supply - Internal | 4.75V~5.25V | |
| Number of Product Terms | 132Product Terms | |
| Length | 11.5062mm | |
| Height Seated (Max) | 4.572mm | |
| Width | 11.5062mm | |
| Radiation Hardening | No | |
| RoHS Status | Non-RoHS Compliant | |
| Lead Free | Lead Free |
GAL22V10D-15LJ Документы
- DatasheetsGAL22V10 Package Diagrams
- PCN PackagingAll Dev Pkg Mark Chg 12/Nov/2018
- ConflictMineralStatementLattice-Semiconductor-company-57.pdf
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