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- A10V10B-PLG68C
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A10V10B-PLG68C Технические параметры
Microchip A10V10B-PLG68C technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) | |
| Марка | Microchip | |
| Surface Mount | YES | |
| Mount | Surface Mount | |
| Number of Terminals | 68Terminals | |
| Manufacturer Part Number | A10V10B-PLG68C | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | MICROSEMI CORP | |
| Package Description | QCCJ, LDCC68,1.0SQ | |
| Risk Rank | 5.81 | |
| Clock Frequency-Max | 50 MHz | |
| Moisture Sensitivity Levels | 3 | |
| Operating Temperature-Max | 70 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | QCCJ | |
| Package Equivalence Code | LDCC68,1.0SQ | |
| Package Shape | SQUARE | |
| Package Style | CHIP CARRIER | |
| Supply Voltage-Max | 3.6 V | |
| Supply Voltage-Nom | 3.3 V | |
| Reflow Temperature-Max (s) | 40 | |
| Number of I/Os | 57I/Os | |
| RoHS | Compliant | |
| Supply Voltage-Min | 3 V | |
| JESD-609 Code | e3 | |
| Terminal Finish | MATTE TIN | |
| Max Operating Temperature | 70 °C |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Min Operating Temperature | 0 °C | |
| Additional Feature | MAX 57 I/OS | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 245 | |
| Terminal Pitch | 1.27 mm | |
| Reach Compliance Code | compliant | |
| JESD-30 Code | S-PQCC-J68 | |
| Number of Outputs | 57Outputs | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 3.3 V | |
| Power Supplies | 3.3 V | |
| Temperature Grade | COMMERCIAL | |
| Propagation Delay | 6.5 ns | |
| Number of Inputs | 57Inputs | |
| Organization | 295 CLBS, 1200 GATES | |
| Seated Height-Max | 4.445 mm | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Gates | 1200Gates | |
| Number of Logic Blocks (LABs) | 295Logic Blocks (LABs)s | |
| Number of Registers | 147Registers | |
| Combinatorial Delay of a CLB-Max | 4.5 ns | |
| Number of CLBs | 295CLBs | |
| Number of Logic Cells | 295Logic Cells | |
| Number of Equivalent Gates | 1200Equivalent Gates | |
| Length | 24.13 mm | |
| Width | 24.13 mm | |
| Radiation Hardening | No |
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