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- A1425A-1PLG84I
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A1425A-1PLG84I Технические параметры
Microchip A1425A-1PLG84I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) | |
| Марка | Microchip | |
| Surface Mount | YES | |
| Mount | Surface Mount | |
| Number of Pins | 84Pins | |
| Number of Terminals | 84Terminals | |
| Manufacturer Part Number | A1425A-1PLG84I | |
| Rohs Code | Yes | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | MICROSEMI CORP | |
| Package Description | ROHS COMPLIANT, PLASTIC, LCC-84 | |
| Risk Rank | 5.82 | |
| Clock Frequency-Max | 150 MHz | |
| Moisture Sensitivity Levels | 3 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | QCCJ | |
| Package Shape | SQUARE | |
| Package Style | CHIP CARRIER | |
| Supply Voltage-Max | 5.5 V | |
| Supply Voltage-Nom | 5 V | |
| Reflow Temperature-Max (s) | 40 | |
| Number of I/Os | 70I/Os | |
| RoHS | Compliant | |
| Supply Voltage-Min | 4.5 V | |
| JESD-609 Code | e3 | |
| Terminal Finish | MATTE TIN |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Max Operating Temperature | 85 °C | |
| Min Operating Temperature | -40 °C | |
| Additional Feature | MAX 70 I/OS | |
| Terminal Position | QUAD | |
| Terminal Form | J BEND | |
| Peak Reflow Temperature (Cel) | 245 | |
| Terminal Pitch | 1.27 mm | |
| Reach Compliance Code | compliant | |
| Frequency | 150 MHz | |
| JESD-30 Code | S-PQCC-J84 | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 5 V | |
| Temperature Grade | INDUSTRIAL | |
| Max Supply Voltage | 5.5 V | |
| Min Supply Voltage | 4.5 V | |
| Propagation Delay | 2.6 ns | |
| Organization | 310 CLBS, 2500 GATES | |
| Seated Height-Max | 4.572 mm | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Logic Elements/Cells | 310Logic Elements/Cells | |
| Number of Gates | 2500Gates | |
| Number of Logic Blocks (LABs) | 310Logic Blocks (LABs)s | |
| Combinatorial Delay of a CLB-Max | 2.6 ns | |
| Number of CLBs | 310CLBs | |
| Number of Equivalent Gates | 2500Equivalent Gates | |
| Length | 29.3116 mm | |
| Width | 29.3116 mm |
Индекс :
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