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- Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD)
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- A1460A-PG207C
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A1460A-PG207C Технические параметры
Microchip A1460A-PG207C technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) | |
| Марка | Microchip | |
| Surface Mount | NO | |
| Number of Terminals | 207Terminals | |
| Manufacturer Part Number | A1460A-PG207C | |
| Rohs Code | No | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | MICROSEMI CORP | |
| Package Description | HPGA, | |
| Risk Rank | 8.77 | |
| Clock Frequency-Max | 100 MHz | |
| Operating Temperature-Max | 70 °C | |
| Package Body Material | CERAMIC, METAL-SEALED COFIRED | |
| Package Code | HPGA | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY, HEAT SINK/SLUG | |
| Supply Voltage-Max | 5.25 V | |
| Supply Voltage-Nom | 5 V | |
| Supply Voltage-Min | 4.75 V |
| Свойство продукта | Значение свойства | |
|---|---|---|
| JESD-609 Code | e0 | |
| Terminal Finish | Tin/Lead (Sn/Pb) | |
| Additional Feature | MAX 168 I/OS | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | PERPENDICULAR | |
| Terminal Form | PIN/PEG | |
| Terminal Pitch | 2.54 mm | |
| Reach Compliance Code | compliant | |
| JESD-30 Code | S-CPGA-P207 | |
| Qualification Status | Not Qualified | |
| Temperature Grade | COMMERCIAL | |
| Organization | 848 CLBS, 6000 GATES | |
| Seated Height-Max | 9.4234 mm | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Combinatorial Delay of a CLB-Max | 3 ns | |
| Number of CLBs | 848CLBs | |
| Number of Equivalent Gates | 6000Equivalent Gates | |
| Length | 44.958 mm | |
| Width | 44.958 mm |
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