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HD74LV1G125AVS(E-E) Технические параметры

Renesas Electronics  HD74LV1G125AVS(E-E) technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Logic - Specialty Logic
Марка
Surface Mount YES
Number of Terminals 5Terminals
ECCN (US) EAR99
Logic Family LV
Number of Elements per Chip 1
Number of Channels per Chip 1
Number of Inputs per Chip 1
Number of Input Enables per Chip 0
Number of Outputs per Chip 1
Number of Output Enables per Chip 1 Low
Bus Hold No
Maximum Propagation Delay Time @ Maximum CL (ns) [email protected]|[email protected]|[email protected]|7.5@5V
Absolute Propagation Delay Time (ns) 38
Process Technology CMOS
Input Signal Type Single-Ended
Maximum Low Level Output Current (mA) 12
Maximum High Level Output Current (mA) -12
Minimum Operating Supply Voltage (V) 1.65
Typical Operating Supply Voltage (V) 5|3.3|1.8|2.5
Maximum Operating Supply Voltage (V) 5.5
Maximum Quiescent Current (uA) 10
Propagation Delay Test Condition (pF) 50
Maximum Power Dissipation (mW) 200
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Supplier Package VSON
Mounting Surface Mount
Package Height 0.6(Max)
Package Length 1.6
Package Width 1.2
PCB changed 5
Package Description VSOF,
Package Style SMALL OUTLINE, VERY THIN PROFILE
Moisture Sensitivity Levels 1
Package Body Material PLASTIC/EPOXY
Operating Temperature-Min -40 °C
Reflow Temperature-Max (s) 20
Operating Temperature-Max 85 °C
Rohs Code Yes
Свойство продукта Значение свойства
Manufacturer Part Number HD74LV1G125AVSE-E
Supply Voltage-Nom (Vsup) 1.8 V
Package Code VSOF
Package Shape RECTANGULAR
Manufacturer Renesas Electronics Corporation
Part Life Cycle Code Not Recommended
Samacsys Description Bus Buffer Gate with 3u2013state Output, VSON-5
Ihs Manufacturer RENESAS ELECTRONICS CORP
Risk Rank 5.54
Part Package Code SON
Packaging Tape and Reel
Pbfree Code Yes
Part Status Active
HTS Code 8542.39.00.01
Technology CMOS
Terminal Position DUAL
Terminal Form FLAT
Peak Reflow Temperature (Cel) 260
Number of Functions 1Function
Terminal Pitch 0.5 mm
Reach Compliance Code compliant
Pin Count 5
JESD-30 Code R-PDSO-F5
Qualification Status Not Qualified
Output Type 3-State
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5 V
Temperature Grade INDUSTRIAL
Supply Voltage-Min (Vsup) 1.65 V
Number of Ports 2Ports
Number of Bits 1Bit
Family LV/LV-A/LVX/H
Logic Function Buffer/Line Driver
Output Characteristics 3-STATE
Seated Height-Max 0.6 mm
Output Polarity TRUE
Logic IC Type BUS DRIVER
Propagation Delay (tpd) 36 ns
Width 1.2 mm
Length 1.6 mm
RoHS Status RoHS Compliant

HD74LV1G125AVS(E-E) Документы

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