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XC2S400E-6FTG256I Технические параметры

Xilinx  XC2S400E-6FTG256I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Embedded - FPGAs (Field Programmable Gate Array)
Марка Xilinx
Mount Standard
Number of Pins 256Pins
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256Terminations
ECCN Code EAR99
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Additional Feature MAXIMUM USABLE GATES = 400000
HTS Code 8542.39.00.01
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 1mm
Свойство продукта Значение свойства
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 256
Number of Outputs 410Outputs
Operating Supply Voltage 1.8V
Supply Voltage-Max (Vsup) 1.89V
RAM Size 20kB
Clock Frequency 357MHz
Organization 2400 CLBS, 145000 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Speed Grade 6
Combinatorial Delay of a CLB-Max 0.47 ns
Number of CLBs 2400CLBs
Number of Logic Cells 10800Logic Cells
Number of Equivalent Gates 145000Equivalent Gates
Width 17mm
Height Seated (Max) 2mm
Length 17mm
RoHS Status RoHS Compliant
Radiation Hardening No
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XC2S400E-6FTG256I Документы

XC2S400E-6FTG256I brand manufacturers: Xilinx, Anli stock, XC2S400E-6FTG256I reference price.Xilinx. XC2S400E-6FTG256I parameters, XC2S400E-6FTG256I Datasheet PDF and pin diagram description download.You can use the XC2S400E-6FTG256I Embedded - FPGAs (Field Programmable Gate Array), DSP Datesheet PDF, find XC2S400E-6FTG256I pin diagram and circuit diagram and usage method of function,XC2S400E-6FTG256I electronics tutorials.You can download from the Anli.