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XC2S50E-6FT256I Технические параметры

Xilinx  XC2S50E-6FT256I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Embedded - FPGAs (Field Programmable Gate Array)
Марка Xilinx
Mount Standard
Number of Pins 256Pins
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 256Terminations
ECCN Code EAR99
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Additional Feature MAXIMUM USABLE GATES = 50000
HTS Code 8542.39.00.01
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 1.8V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Свойство продукта Значение свойства
Pin Count 256
Number of Outputs 182Outputs
Operating Supply Voltage 1.8V
Supply Voltage-Max (Vsup) 1.89V
RAM Size 4kB
Clock Frequency 357MHz
Organization 384 CLBS, 23000 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Speed Grade 6
Combinatorial Delay of a CLB-Max 0.47 ns
Number of CLBs 384CLBs
Number of Logic Cells 1728Logic Cells
Number of Equivalent Gates 23000Equivalent Gates
Length 17mm
Height Seated (Max) 2mm
Width 17mm
Radiation Hardening No
RoHS Status Non-RoHS Compliant
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XC2S50E-6FT256I Документы

XC2S50E-6FT256I brand manufacturers: Xilinx, Anli stock, XC2S50E-6FT256I reference price.Xilinx. XC2S50E-6FT256I parameters, XC2S50E-6FT256I Datasheet PDF and pin diagram description download.You can use the XC2S50E-6FT256I Embedded - FPGAs (Field Programmable Gate Array), DSP Datesheet PDF, find XC2S50E-6FT256I pin diagram and circuit diagram and usage method of function,XC2S50E-6FT256I electronics tutorials.You can download from the Anli.