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XC2S50E-6PQG208I Технические параметры

Xilinx  XC2S50E-6PQG208I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.

Свойство продукта Значение свойства
Классификация Embedded - FPGAs (Field Programmable Gate Array)
Марка Xilinx
Package / Case PQFP
Surface Mount YES
Number of Pins 208Pins
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 208Terminations
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Additional Feature MAXIMUM USABLE GATES = 50000
HTS Code 8542.39.00.01
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Свойство продукта Значение свойства
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 208
Number of Outputs 182Outputs
Operating Supply Voltage 1.8V
Supply Voltage-Max (Vsup) 1.89V
RAM Size 4kB
Clock Frequency 357MHz
Organization 384 CLBS, 23000 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Speed Grade 6
Combinatorial Delay of a CLB-Max 0.47 ns
Number of CLBs 384CLBs
Number of Logic Cells 1728Logic Cells
Number of Equivalent Gates 23000Equivalent Gates
Length 28mm
Height Seated (Max) 4.1mm
Width 28mm
Radiation Hardening No
RoHS Status RoHS Compliant
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XC2S50E-6PQG208I Документы

XC2S50E-6PQG208I brand manufacturers: Xilinx, Anli stock, XC2S50E-6PQG208I reference price.Xilinx. XC2S50E-6PQG208I parameters, XC2S50E-6PQG208I Datasheet PDF and pin diagram description download.You can use the XC2S50E-6PQG208I Embedded - FPGAs (Field Programmable Gate Array), DSP Datesheet PDF, find XC2S50E-6PQG208I pin diagram and circuit diagram and usage method of function,XC2S50E-6PQG208I electronics tutorials.You can download from the Anli.