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- XC5202-3VQ100C
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XC5202-3VQ100C Технические параметры
Xilinx XC5202-3VQ100C technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) | |
| Марка | Xilinx | |
| Surface Mount | YES | |
| Number of Pins | 100Pins | |
| Number of Terminals | 100Terminals | |
| Manufacturer Part Number | XC5202-3VQ100C | |
| Rohs Code | No | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | XILINX INC | |
| Part Package Code | QFP | |
| Package Description | PLASTIC, VQFP-100 | |
| Risk Rank | 5.81 | |
| Clock Frequency-Max | 83 MHz | |
| Moisture Sensitivity Levels | 3 | |
| Operating Temperature-Max | 85 °C | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | TFQFP | |
| Package Equivalence Code | TQFP100,.63SQ | |
| Package Shape | SQUARE | |
| Package Style | FLATPACK, THIN PROFILE, FINE PITCH | |
| Supply Voltage-Max | 5.25 V | |
| Supply Voltage-Nom | 5 V | |
| Reflow Temperature-Max (s) | 30 | |
| RoHS | Compliant | |
| Supply Voltage-Min | 4.75 V | |
| JESD-609 Code | e0 | |
| Pbfree Code | No | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Max Operating Temperature | 85 °C | |
| Min Operating Temperature | 0 °C | |
| Additional Feature | MAX AVAILABLE 3000 LOGIC GATES | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | QUAD | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 225 | |
| Terminal Pitch | 0.5 mm | |
| Reach Compliance Code | unknown | |
| Pin Count | 100 | |
| JESD-30 Code | S-PQFP-G100 | |
| Number of Outputs | 84Outputs | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 5 V | |
| Power Supplies | 5 V | |
| Temperature Grade | OTHER | |
| Number of Inputs | 84Inputs | |
| Organization | 64 CLBS, 2000 GATES | |
| Seated Height-Max | 1.2 mm | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Speed Grade | 3 | |
| Number of Registers | 256Registers | |
| Combinatorial Delay of a CLB-Max | 3 ns | |
| Number of CLBs | 64CLBs | |
| Number of Logic Cells | 64Logic Cells | |
| Number of Equivalent Gates | 2000Equivalent Gates | |
| Length | 14 mm | |
| Width | 14 mm | |
| Radiation Hardening | No |
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