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- XC5VLX50T-1FFG665I
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XC5VLX50T-1FFG665I Технические параметры
Xilinx Inc. XC5VLX50T-1FFG665I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - FPGAs (Field Programmable Gate Array) | |
| Марка | ||
| Factory Lead Time | 10 Weeks | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 665-BBGA, FCBGA | |
| Number of Pins | 665Pins | |
| Number of I/Os | 360I/Os | |
| Operating Temperature | -40°C~100°C TJ | |
| Packaging | Tray | |
| Series | Virtex®-5 LXT | |
| Published | 1999 | |
| JESD-609 Code | e1 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 4 (72 Hours) | |
| Number of Terminations | 665Terminations | |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) | |
| Voltage - Supply | 0.95V~1.05V | |
| Terminal Position | BOTTOM |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 250 | |
| Supply Voltage | 1V | |
| Reach Compliance Code | not_compliant | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Base Part Number | XC5VLX50 | |
| Pin Count | 665 | |
| Number of Outputs | 360Outputs | |
| Qualification Status | Not Qualified | |
| Operating Supply Voltage | 1V | |
| RAM Size | 270kB | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Number of Logic Elements/Cells | 46080Logic Elements/Cells | |
| Total RAM Bits | 2211840 | |
| Number of LABs/CLBs | 3600LABs/CLBs | |
| Speed Grade | 1 | |
| Length | 27mm | |
| Height Seated (Max) | 2.9mm | |
| Width | 27mm | |
| RoHS Status | ROHS3 Compliant |
XC5VLX50T-1FFG665I Документы
- DatasheetsVirtex-5 Family Overview Virtex-5 FPGA Datasheet Virtex-5 FPGA User Guide XC5VLX50T1FFG665I-Xilinx-datasheet-6396844.pdf XC5VLX50T1FFG665I-Xilinx-datasheet-14104110.pdf
- Environmental InformationXilinx RoHS3
- PCN Design/SpecificationSubstrate BallPad Metal Change 8/Feb/2016 Cross-Ship Lead-Free Notice 31/Oct/2016 Mult Dev Material Chg 16/Dec/2019
- PCN PackagingVirtex-5, SXT FPGA 11/March/2008
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