Локаль
Язык
- English
- русский
Валюта
- CNY-¥
- RUB-₽
Цена такой валюты может меняться в зависимости от курса только для справки
Корзина для покупок - Все продукты
- /
- Integrated Circuits (ICs)
- /
- Embedded - System On Chip (SoC)
- /
- XC7Z010-L1CLG225I
Есть складские запасы
Min. : 1
Mult. : 1
Mult. : 1
Not available to buy on line? Want the lower wholesale price? Please
sendRFQ, we will
respond immediately
XC7Z010-L1CLG225I Технические параметры
Xilinx Inc. XC7Z010-L1CLG225I technical specifications, attributes, parameters and parts with similar specifications to Silicon Labs SI1084-A-GM.
| Свойство продукта | Значение свойства | |
|---|---|---|
| Классификация | Embedded - System On Chip (SoC) | |
| Марка | ||
| Factory Lead Time | 10 Weeks | |
| Contact Plating | Copper, Silver, Tin | |
| Mount | Surface Mount | |
| Package / Case | 225-LFBGA, CSPBGA | |
| Number of I/Os | 86I/Os | |
| Operating Temperature | -40°C~100°C TJ | |
| Packaging | Tray | |
| Series | Zynq®-7000 | |
| Published | 2010 | |
| JESD-609 Code | e1 | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | |
| Number of Terminations | 225Terminations | |
| ECCN Code | EAR99 | |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
| Additional Feature | PL BLOCK OPERATES IN 0.97V TO 1.03V SUPPLY | |
| HTS Code | 8542.39.00.01 | |
| Terminal Position | BOTTOM | |
| Terminal Form | BALL | |
| Peak Reflow Temperature (Cel) | 260 |
| Свойство продукта | Значение свойства | |
|---|---|---|
| Supply Voltage | 1V | |
| Terminal Pitch | 0.8mm | |
| Frequency | 667MHz | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| JESD-30 Code | S-PBGA-B225 | |
| Operating Supply Voltage | 1V | |
| Supply Voltage-Max (Vsup) | 1.05V | |
| Interface | CAN, EBI/EMI, Ethernet, I2C, MMC, SD, SDIO, SPI, UART, USART, USB | |
| RAM Size | 256KB | |
| Core Processor | Dual ARM® Cortex®-A9 MPCore™ with CoreSight™ | |
| Peripherals | DMA | |
| Connectivity | CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SPI, UART/USART, USB OTG | |
| Architecture | MCU, FPGA | |
| Data Bus Width | 32b | |
| Core Architecture | ARM | |
| Boundary Scan | YES | |
| RAM (words) | 256000 | |
| Primary Attributes | Artix™-7 FPGA, 28K Logic Cells | |
| Bus Compatibility | CAN; ETHERNET; I2C; SPI; UART; USB | |
| Length | 13mm | |
| Height Seated (Max) | 1.5mm | |
| RoHS Status | ROHS3 Compliant |
XC7Z010-L1CLG225I Документы
- DatasheetsZynq-7000 User Guide Zynq-7000 SoC Specification Zynq-7000 All Programmable SoC Overview
- Environmental InformationXilinx RoHS3
- PCN Design/SpecificationZynq-7000 AP Requirement 28/Sep/2015
Индекс :
0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ